254 search results - page 22 / 51 » Design and VLSI Implementation of a Unified Synapse-Neuron A... |
SENSYS
2010
ACM
14 years 7 months ago
2010
ACM
We present A-MAC, a receiver-initiated link layer for low-power wireless networks that supports several services under a unified architecture, and does so more efficiently and sca...
FCCM
2006
IEEE
15 years 3 months ago
2006
IEEE
Recently, platform FPGAs that integrate sequential processors with a spatial fabric have become prevalent. While these hybrid architectures ease the burden of integrating sequenti...
FCCM
2005
IEEE
15 years 3 months ago
2005
IEEE
In many image processing applications, fast convolution of an image with a large 2D filter is required. Field Programable Gate Arrays (FPGAs) are often used to achieve this goal ...
RTCSA
2005
IEEE
15 years 3 months ago
2005
IEEE
Context-aware middleware encompasses uniform ions and reliable services for common operations, supports for most of the tasks involved in dealing with context, and thus simplifyin...
SBCCI
2005
ACM
15 years 3 months ago
2005
ACM
The physical implementation of cryptographic algorithms may leak to some attacker security information by the side channel data, as power consumption, timing, temperature or elect...