254 search results - page 6 / 51 » Design and VLSI Implementation of a Unified Synapse-Neuron A... |
101
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APCCAS
2006
IEEE
15 years 3 months ago
2006
IEEE
We propose a high-performance hardware accelerator for intra prediction and mode decision in H.264/AVC video encoding. We use two intra prediction units to increase the performance...
VLSID
2009
IEEE
15 years 10 months ago
2009
IEEE
: The challenges in nano-CMOS circuit design include the following: variability, leakage, power, thermals, reliability, and yield. This talk will focus on interdependent considerat...
CAINE
2003
14 years 11 months ago
2003
Most security protocols share a similar set of algorithms and functions and exhibit common sequences and patterns in the way they operate. These observations led us to propose a u...
107
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TSP
2008
14 years 9 months ago
2008
This paper presents a systematic high-speed VLSI implementation of the discrete wavelet transform (DWT) based on hardware-efficient parallel FIR filter structures. High-speed 2-D D...
VLSID
2000
IEEE
15 years 2 months ago
2000
IEEE
The action systems framework has recently been applied to the area of synchronous VLSI design. In this paper, we present a set of concepts necessary in the formal design of synchr...