220 search results - page 11 / 44 » Design and analysis of optimal adaptive de-jitter buffers |
INFOCOM
2010
IEEE
14 years 8 months ago
2010
IEEE
Abstract— Robustness and reliability are critical issues in network management. To provide resiliency, a popular protection scheme against network failures is the simultaneous ro...
ESTIMEDIA
2008
Springer
14 years 11 months ago
2008
Springer
We propose a design optimization framework for adaptive real-time streaming applications. The main contribution is a hybrid approach for performance analysis combining formal anal...
FCCM
2003
IEEE
15 years 2 months ago
2003
IEEE
This paper introduces a design tool and its associated procedures for determining the sensitivity of outputs in a digital signal processing design to small errors introduced by ro...
DAC
2004
ACM
15 years 10 months ago
2004
ACM
Power consumption, particularly runtime leakage, in long on-chip buses has grown to an unacceptable portion of the total power budget due to heavy buffer insertion to combat RC de...
TCAD
2008
14 years 9 months ago
2008
Physical synthesis tools are responsible for achieving timing closure. Starting with 130nm designs, multiple cycles are required to cross the chip, making latch placement critical...