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» Design and architectures for dependable embedded systems
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DAC
2006
ACM
16 years 22 days ago
Exploring compromises among timing, power and temperature in three-dimensional integrated circuits
Three-dimensional integrated circuits (3DICs) have the potential to reduce interconnect lengths and improve digital system performance. However, heat removal is more difficult in ...
Hao Hua, Christopher Mineo, Kory Schoenfliess, Amb...
CCS
2008
ACM
15 years 1 months ago
SNAPP: stateless network-authenticated path pinning
This paper examines a new building block for next-generation networks: SNAPP, or Stateless Network-Authenticated Path Pinning. SNAPP-enabled routers securely embed their routing d...
Bryan Parno, Adrian Perrig, Dave Andersen
ICCS
2003
Springer
15 years 5 months ago
Self-Organizing Hybrid Neurofuzzy Networks
Abstract. We introduce a concept of self-organizing Hybrid Neurofuzzy Networks (HNFN), a hybrid modeling architecture combining neurofuzzy (NF) and polynomial neural networks(PNN)....
Sung-Kwun Oh, Su-Chong Joo, Chang-Won Jeong, Hyun-...
ASWSD
2004
Springer
15 years 5 months ago
Simulink Integration of Giotto/TDL
The paper first presents the integration options of what we call the Timing Description Language (TDL) with MathWorks' Simulink tools. Based on the paradigm of logical executi...
Wolfgang Pree, Gerald Stieglbauer, Josef Templ
ASPLOS
2006
ACM
15 years 5 months ago
Introspective 3D chips
While the number of transistors on a chip increases exponentially over time, the productivity that can be realized from these systems has not kept pace. To deal with the complexit...
Shashidhar Mysore, Banit Agrawal, Navin Srivastava...