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» Design and implementation of WIRE Diameter
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CNSR
2010
IEEE
164views Communications» more  CNSR 2010»
15 years 8 months ago
Buffered Crossbar Fabrics Based on Networks on Chip
— Buffered crossbar (CICQ) switches have shown a high potential in scaling Internet routers capacity. However, they require expensive on-chip buffers whose cost grows quadratical...
Lotfi Mhamdi, Kees Goossens, Iria Varela Senin
FPGA
2005
ACM
156views FPGA» more  FPGA 2005»
15 years 10 months ago
Design of programmable interconnect for sublithographic programmable logic arrays
Sublithographic Programmable Logic Arrays can be interconnected and restored using nanoscale wires. Building on a hybrid of bottom-up assembly techniques supported by conventional...
André DeHon
IPPS
1998
IEEE
15 years 9 months ago
Impact of Switch Design on the Application Performance of Cache-Coherent Multiprocessors
In this paper, the effect of switch design on the application performance of cache-coherent non-uniform memory access (CC-NUMA) multiprocessors is studied in detail. Wormhole rout...
Laxmi N. Bhuyan, Hu-Jun Wang, Ravi R. Iyer, Akhile...
168
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ISCAS
2005
IEEE
170views Hardware» more  ISCAS 2005»
15 years 10 months ago
Quantized LDPC decoder design for binary symmetric channels
Abstract— Binary Symmetric Channels (BSC) like the Interchip buses and the Intra-chip buses are gaining a lot of attention due to their widespread use with multimedia storage dev...
Rohit Singhal, Gwan S. Choi, Rabi N. Mahapatra
IPPS
2003
IEEE
15 years 10 months ago
RMIX: A Multiprotocol RMI Framework for Java
With the increasing adoption of Java for parallel and distributed computing, there is a strong motivation for enhancing the expressive elegance of the RMI paradigm with flexible ...
Dawid Kurzyniec, Tomasz Wrzosek, Vaidy S. Sunderam...