1145 search results - page 164 / 229 » Design and implementation of a data mining grid-aware archit... |
EUROPAR
2004
Springer
15 years 3 months ago
2004
Springer
As the Grid moves towards adopting a service-oriented architecture built on Web services, coupling between processes will rely on secure, reliable, and transacted messages and be s...
DAC
2000
ACM
15 years 10 months ago
2000
ACM
In this paper we describe an area efficient power minimization scheme "Control Generated ClockingI` that saves significant amounts of power in datapath registers and clock dr...
EUROPAR
2009
Springer
15 years 1 months ago
2009
Springer
The Cell Broadband Engine (Cell BE) is a heterogeneous multi-core processor specifically designed to exploit thread-level parallelism. Its memory model comprehends a common shared ...
MICRO
2008
IEEE
15 years 4 months ago
2008
IEEE
With the multitude of existing and upcoming wireless standards, it is becoming increasingly difficult for hardware-only baseband processing solutions to adapt to the rapidly chan...
ISCAS
2005
IEEE
15 years 3 months ago
2005
IEEE
Abstract- This paper describes the implementation of an areaefficient and protected user memory-mapped network interface, the pbuf (Parcel Buffer), for the Data IntensiVe Architect...