Sciweavers

1145 search results - page 197 / 229
» Design and implementation of a data mining grid-aware archit...
Sort
View
85
Voted
ISCA
2010
IEEE
205views Hardware» more  ISCA 2010»
15 years 2 months ago
The virtual write queue: coordinating DRAM and last-level cache policies
In computer architecture, caches have primarily been viewed as a means to hide memory latency from the CPU. Cache policies have focused on anticipating the CPU’s data needs, and...
Jeffrey Stuecheli, Dimitris Kaseridis, David Daly,...
120
Voted
ANSOFT
2002
126views more  ANSOFT 2002»
14 years 9 months ago
The Real-Time Process Algebra (RTPA)
Abstract. The real-time process algebra (RTPA) is a set of new mathematical notations for formally describing system architectures, and static and dynamic behaviors. It is recogniz...
Yingxu Wang
DAC
2007
ACM
15 years 10 months ago
Trusted Hardware: Can It Be Trustworthy?
Processing and storage of confidential or critical information is an every day occurrence in computing systems. The trustworthiness of computing devices has become an important co...
Cynthia E. Irvine, Karl N. Levitt
79
Voted
SIGCOMM
2010
ACM
14 years 9 months ago
SwitchBlade: a platform for rapid deployment of network protocols on programmable hardware
We present SwitchBlade, a platform for rapidly deploying custom protocols on programmable hardware. SwitchBlade uses a pipeline-based design that allows individual hardware module...
Muhammad Bilal Anwer, Murtaza Motiwala, Muhammad M...
VVS
2000
IEEE
128views Visualization» more  VVS 2000»
15 years 2 months ago
The ULTRAVIS system
This paper describes architecture and implementation of the ULTRAVIS system, a pure software solution for versatile and fast volume rendering. It provides perspective raycasting, ...
Günter Knittel