1145 search results - page 44 / 229 » Design and implementation of a data mining grid-aware archit... |
AIIA
2003
Springer
15 years 1 months ago
2003
Springer
A novel, two stage, neural architecture for the segmentation of range data and their modeling with undeformed superquadrics is presented. The system is composed by two distinct neu...
ISCAS
1994
IEEE
15 years 1 months ago
1994
IEEE
This paper presents a novel VLSI architecture for high-speed data compressor designs which implement the well-known LZ77 algorithm. The architecture mainly consists of three units...
MSS
2003
IEEE
15 years 2 months ago
2003
IEEE
: Several solutions have been developed to provide dataintensive applications with the highest possible data rates. Such solutions tried to utilize the available network resources ...
FPL
2000
Springer
15 years 1 months ago
2000
Springer
Coarse-grain reconfigurable architectures have been a matter of intense research in the last few years. They promise to be more adequate for computational tasks due to their better...
FPL
1997
Springer
15 years 1 months ago
1997
Springer
Protocol Boosters are functional elements, inserted anddeleted fromnetwork protocol stacks on an as-neededbasis. The Protocol Booster design methodology attempts to improve end-to-...