1145 search results - page 54 / 229 » Design and implementation of a data mining grid-aware archit... |
78
Voted
IPPS
2009
IEEE
15 years 4 months ago
2009
IEEE
DTA (Decoupled Threaded Architecture) is designed to exploit fine/medium grained Thread Level Parallelism (TLP) by using a distributed hardware scheduling unit and relying on exi...
FCCM
2009
IEEE
15 years 1 months ago
2009
IEEE
FPGA has long been considered an attractive platform for high performance implementations of string matching. However, as the size of pattern dictionaries continues to grow, such ...
79
Voted
DAC
2005
ACM
15 years 10 months ago
2005
ACM
This paper presents two novel and high performance hardware architectures, implemented in FPGA technology, for the KASUMI block cipher; this algorithm lies at the core of the conf...
DSONLINE
2008
14 years 9 months ago
2008
Ubiquitous applications are characterised by variations of their execution context. Their correct operation requires some continual adaptations based on the observation of their e...
WWW
2006
ACM
15 years 10 months ago
2006
ACM
We present a novel model for validating and improving the content and structure organization of a website. This model studies the website as a graph and evaluates its interconnect...