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» Design and implementation of a low-power workstation
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ISLPED
1997
ACM
106views Hardware» more  ISLPED 1997»
15 years 1 months ago
Energy delay measures of barrel switch architectures for pre-alignment of floating point operands for addition
Significand pre-alignment is a pre requisite for floating point additions. This paper1 addresses the architectural design and energy delay evaluation of a Low Power Barrel Switch ...
R. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Kha...
HPDC
1994
IEEE
15 years 1 months ago
Design and Implementation of Parallel Algorithms for Gene-Finding
Finding genes unequivocally in DNA sequences is one of the key goals of the Human Genome project. The human genome is a 9 billion character long DNA sequence and is estimated to c...
James Puthukattukaran, Suresh Chalasani, Periannan...
80
Voted
ISLPED
2010
ACM
206views Hardware» more  ISLPED 2010»
14 years 9 months ago
Energy efficient implementation of parallel CMOS multipliers with improved compressors
Booth encoding is believed to yield faster multiplier designs with higher energy consumption. 16x16-bit Booth and NonBooth multipliers are analyzed in energy and delay space under...
Dursun Baran, Mustafa Aktan, Vojin G. Oklobdzija
93
Voted
ISCAS
1999
IEEE
87views Hardware» more  ISCAS 1999»
15 years 1 months ago
Instruction level power model of microcontrollers
In the design of low power systems, it is important to analyze and optimize both the hardware and the software component of the system. To evaluate the software component of the s...
C. Chakrabarti, D. Gaitonde
PPL
2008
185views more  PPL 2008»
14 years 9 months ago
On Design and Application Mapping of a Network-on-Chip(NoC) Architecture
As the number of integrated IP cores in the current System-on-Chips (SoCs) keeps increasing, communication requirements among cores can not be sufficiently satisfied using either ...
Jun Ho Bahn, Seung Eun Lee, Yoon Seok Yang, Jungso...