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» Design and implementation of a low-power workstation
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AAAI
1998
14 years 11 months ago
An Architecture for Exploring Large Design Spaces
We describe an architecture for exploring very large design spaces, for example, spaces that arise when design candidates are generated by combining components systematically from...
John R. Josephson, B. Chandrasekaran, Mark Carroll...
PADS
2003
ACM
15 years 2 months ago
DVS: An Object-Oriented Framework for Distributed Verilog Simulation
There is a wide-spread usage of hardware design languages(HDL) to speed up the time-to-market for the design of modern digital systems. Verification engineers can simulate hardwa...
Lijun Li, Hai Huang, Carl Tropper
ISLPED
2005
ACM
100views Hardware» more  ISLPED 2005»
15 years 3 months ago
A tunable bus encoder for off-chip data buses
Off-Chip buses constitute a significant portion of the total system power in embedded systems. Past research has focused on encoding contiguous bit positions in data values to red...
Dinesh C. Suresh, Banit Agrawal, Jun Yang 0002, Wa...
GLVLSI
2003
IEEE
119views VLSI» more  GLVLSI 2003»
15 years 2 months ago
Simultaneous peak and average power minimization during datapath scheduling for DSP processors
The use of multiple supply voltages for energy and average power reduction is well researched and several works have appeared in the literature. However, in low power design using...
Saraju P. Mohanty, N. Ranganathan, Sunil K. Chappi...
CCGRID
2001
IEEE
15 years 1 months ago
Parallel I/O Support for HPF on Clusters
Clusters of workstations are a popular alternative to integrated parallel systems designed and built by a vendor. Besides their huge cumulative processing power, they also provide...
Peter Brezany, Viera Sipková