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» Design and implementation of correlating caches
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ANCS
2007
ACM
15 years 3 months ago
Ruler: high-speed packet matching and rewriting on NPUs
Programming specialized network processors (NPU) is inherently difficult. Unlike mainstream processors where architectural features such as out-of-order execution and caches hide ...
Tomas Hruby, Kees van Reeuwijk, Herbert Bos
ICCD
2000
IEEE
119views Hardware» more  ICCD 2000»
15 years 3 months ago
Source-Level Transformations for Improved Formal Verification
A major obstacle to widespread acceptance of formal verification is the difficulty in using the tools effectively. Although learning the basic syntax and operation of a formal ver...
Brian D. Winters, Alan J. Hu
SIGGRAPH
1991
ACM
15 years 3 months ago
An object-oriented framework for the integration of interactive animation techniques
We present an interactive modeling and animation system that facilitates the integration of a variety of simulation and animation paradigms. This system permits the modeling of di...
Robert C. Zeleznik, D. Brookshire Conner, Matthias...
IJCAI
2003
15 years 1 months ago
Writer's Aid: Using a Planner in a Collaborative Interface
Writer’s Aid is a collaborative system that works simultaneously with an author editing a document providing assistance in identifying and inserting citation keys and autonomous...
Tamara Babaian, Barbara J. Grosz, Stuart M. Shiebe...
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JUCS
2008
147views more  JUCS 2008»
14 years 11 months ago
Security and Usability Aspects of Man-in-the-Middle Attacks on ZRTP
Abstract: ZRTP is a protocol designed to set up a shared secret between two communication parties which is subsequently used to secure the media stream (i.e. the audio data) of a V...
Martin Petraschek, Thomas Hoeher, Oliver Jung, Hel...