584 search results - page 21 / 117 » Design and implementation of correlating caches |
HIPEAC
2007
Springer
15 years 3 months ago
2007
Springer
Caches are designed to provide the best tradeoff between access speed and capacity for a set of target applications. Unfortunately, different applications, and even different phas...
184
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GLVLSI
2011
IEEE
14 years 1 months ago
2011
IEEE
This paper proposes a novel L1 data cache design with dualversioning SRAM cells (dvSRAM) for chip multi-processors (CMP) that implement optimistic concurrency proposals. In this n...
55
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ISCAS
2003
IEEE
15 years 2 months ago
2003
IEEE
This paper describes the hardware design and implementation of the JAWS (Just Another Watermarking System) embedder and detector for watermarking of realtime uncompressed digital ...
141
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HPCA
2004
IEEE
15 years 10 months ago
2004
IEEE
Recent research suggests that there are large variations in a cache's spatial usage, both within and across programs. Unfortunately, conventional caches typically employ fixe...
153
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SIGMOD
2009
ACM
15 years 9 months ago
2009
ACM
With large amounts of correlated probabilistic data being generated in a wide range of application domains including sensor networks, information extraction, event detection etc.,...