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» Design and implementation of correlating caches
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INFOCOM
2005
IEEE
15 years 3 months ago
Exploiting diversity to enhance multimedia streaming over cellular links
Abstract— Wireless Wide Area Networks (WWANs) are becoming ubiquitous across most geographic regions, enabling simultaneous coverage from multiple providers. WWAN channels exhibi...
Julian Chesterfield, Rajiv Chakravorty, Ian Pratt,...
LCTRTS
1998
Springer
15 years 2 months ago
A Tool to Assist in Fine-Tuning and Debugging Embedded Real-Time Systems
: During the latter stages of a software product cycle, developers may be faced with the task of fine-tuning an embedded system that is not meeting all of its timing requirements. ...
Gaurav Arora, David B. Stewart
HPCA
2008
IEEE
15 years 10 months ago
DeCoR: A Delayed Commit and Rollback mechanism for handling inductive noise in processors
Increases in peak current draw and reductions in the operating voltages of processors continue to amplify the importance of dealing with voltage fluctuations in processors. Noise-...
Meeta Sharma Gupta, Krishna K. Rangan, Michael D. ...
SPAA
2006
ACM
15 years 3 months ago
Modeling instruction placement on a spatial architecture
In response to current technology scaling trends, architects are developing a new style of processor, known as spatial computers. A spatial computer is composed of hundreds or eve...
Martha Mercaldi, Steven Swanson, Andrew Petersen, ...
MICRO
2002
IEEE
122views Hardware» more  MICRO 2002»
15 years 2 months ago
Microarchitectural denial of service: insuring microarchitectural fairness
Simultaneous multithreading seeks to improve the aggregate computation bandwidth of a processor core by sharing resources such as functional units, caches, TLB and so on. To date,...
Dirk Grunwald, Soraya Ghiasi