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» Design and implementation of correlating caches
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CORR
2010
Springer
150views Education» more  CORR 2010»
14 years 9 months ago
Boosting Multi-Core Reachability Performance with Shared Hash Tables
Abstract--This paper focuses on data structures for multicore reachability, which is a key component in model checking algorithms and other verification methods. A cornerstone of a...
Alfons Laarman, Jaco van de Pol, Michael Weber 000...
PLDI
2010
ACM
15 years 2 months ago
Adversarial memory for detecting destructive races
Multithreaded programs are notoriously prone to race conditions, a problem exacerbated by the widespread adoption of multi-core processors with complex memory models and cache coh...
Cormac Flanagan, Stephen N. Freund
HPCA
2001
IEEE
15 years 10 months ago
An Architectural Evaluation of Java TPC-W
The use of the Java programming language for implementing server-side application logic is increasing in popularity, yet there is very little known about the architectural require...
Harold W. Cain, Ravi Rajwar, Morris Marden, Mikko ...
ISCA
2006
IEEE
142views Hardware» more  ISCA 2006»
15 years 3 months ago
Bulk Disambiguation of Speculative Threads in Multiprocessors
Transactional Memory (TM), Thread-Level Speculation (TLS), and Checkpointed multiprocessors are three popular architectural techniques based on the execution of multiple, cooperat...
Luis Ceze, James Tuck, Josep Torrellas, Calin Casc...
HIPC
2005
Springer
15 years 3 months ago
Performance Study of LU Decomposition on the Programmable GPU
With the increasing programmability of GPUs (graphics processing units), these units are emerging as an attractive computing platform not only for traditional graphics computation ...
Fumihiko Ino, Manabu Matsui, Keigo Goda, Kenichi H...