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» Design and implementation of correlating caches
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MICRO
2010
IEEE
242views Hardware» more  MICRO 2010»
14 years 7 months ago
ASF: AMD64 Extension for Lock-Free Data Structures and Transactional Memory
Advanced Synchronization Facility (ASF) is an AMD64 hardware extension for lock-free data structures and transactional memory. It provides a speculative region that atomically exec...
Jae-Woong Chung, Luke Yen, Stephan Diestelhorst, M...
HPCA
2011
IEEE
14 years 1 months ago
Calvin: Deterministic or not? Free will to choose
Most shared memory systems maximize performance by unpredictably resolving memory races. Unpredictable memory races can lead to nondeterminism in parallel programs, which can suff...
Derek Hower, Polina Dudnik, Mark D. Hill, David A....
ICC
2011
IEEE
269views Communications» more  ICC 2011»
13 years 9 months ago
Experimental Evaluation of Memory Management in Content-Centric Networking
Abstract—Content-Centric Networking is a new communication architecture that rethinks the Internet communication model, designed for point-to-point connections between hosts, and...
Giovanna Carofiglio, Vinicius Gehlen, Diego Perino
CCS
2005
ACM
15 years 3 months ago
CPOL: high-performance policy evaluation
Policy enforcement is an integral part of many applications. Policies are often used to control access to sensitive information. Current policy specification languages give users ...
Kevin Borders, Xin Zhao, Atul Prakash
FPGA
2011
ACM
393views FPGA» more  FPGA 2011»
14 years 1 months ago
Comparing FPGA vs. custom cmos and the impact on processor microarchitecture
As soft processors are increasingly used in diverse applications, there is a need to evolve their microarchitectures in a way that suits the FPGA implementation substrate. This pa...
Henry Wong, Vaughn Betz, Jonathan Rose