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» Design considerations for network processor operating system...
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143
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ANCS
2007
ACM
15 years 7 months ago
Ruler: high-speed packet matching and rewriting on NPUs
Programming specialized network processors (NPU) is inherently difficult. Unlike mainstream processors where architectural features such as out-of-order execution and caches hide ...
Tomas Hruby, Kees van Reeuwijk, Herbert Bos
122
Voted
MVA
1992
143views Computer Vision» more  MVA 1992»
15 years 4 months ago
A Real-Time Vision System Using Integrated Memory Array Processor Prototype LSI
This study reports on the performance of a Real-Time Vision System (RVS) and its use of an IMAP prototype LSI. This LSI integrates eight 8 bit processors and a 144 Kbit SRAM on a ...
Yoshihiro Fujita, Nobuyuki Yamashita, Shin'ichiro ...
CASES
2000
ACM
15 years 7 months ago
Flexible instruction processors
This paper introduces the notion of a Flexible Instruction Processor (FIP) for systematic customisation of instruction processor design and implementation. The features of our app...
Shay Ping Seng, Wayne Luk, Peter Y. K. Cheung
135
Voted
ISLPED
2003
ACM
122views Hardware» more  ISLPED 2003»
15 years 8 months ago
A mixed-clock issue queue design for globally asynchronous, locally synchronous processor cores
Ever shrinking device sizes and innovative micro-architectural and circuit design techniques have made it possible to have multi-million transistor systems running at multi-gigahe...
Venkata Syam P. Rapaka, Diana Marculescu
CASES
2004
ACM
15 years 7 months ago
Automatic data partitioning for the agere payload plus network processor
With the ever-increasing pervasiveness of the Internet and its stringent performance requirements, network system designers have begun utilizing specialized chips to increase the ...
Steve Carr, Philip H. Sweany