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115
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ARC
2010
Springer
186views Hardware» more  ARC 2010»
15 years 6 months ago
Application-Specific Signatures for Transactional Memory in Soft Processors
As reconfigurable computing hardware and in particular FPGA-based systems-on-chip comprise an increasing number of processor and accelerator cores, supporting sharing and synchroni...
Martin Labrecque, Mark Jeffrey, J. Gregory Steffan
92
Voted
ICS
2009
Tsinghua U.
15 years 10 months ago
Designing multi-socket systems using silicon photonics
Future single-board multi-socket systems may be unable to deliver the needed memory bandwidth electrically due to power limitations, which will hurt their ability to drive perform...
Scott Beamer, Krste Asanovic, Christopher Batten, ...
ISCAS
2007
IEEE
96views Hardware» more  ISCAS 2007»
15 years 9 months ago
Novel High-Speed Redundant Binary to Binary converter using Prefix Networks
— Fast addition and multiplication are of paramount importance in many arithmetic circuits and processors. The use of redundant number system for efficient implementation of thes...
Sreehari Veeramachaneni, Kirthi M. Krishna, Lingam...
FPGA
2006
ACM
100views FPGA» more  FPGA 2006»
15 years 7 months ago
A generic lookup cache architecture for network processing applications
Abstract-- In this paper, we introduce a novel architecture for constructing caches for lookup operations that are used in a variety of network processing applications. The disting...
Janardhan Singaraju, John A. Chandy
124
Voted
ICDCS
2008
IEEE
15 years 10 months ago
Fast Path Session Creation on Network Processors
The security gateways today are required not only to block unauthorized accesses by authenticating packet headers, but also by inspecting connection states to defend against malic...
Bo Xu, Yaxuan Qi, Fei He, Zongwei Zhou, Yibo Xue, ...