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153
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ASPLOS
2006
ACM
15 years 9 months ago
Software-based instruction caching for embedded processors
While hardware instruction caches are present in virtually all general-purpose and high-performance microprocessors today, many embedded processors use SRAM or scratchpad memories...
Jason E. Miller, Anant Agarwal
154
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JSA
2010
158views more  JSA 2010»
14 years 10 months ago
Scalable mpNoC for massively parallel systems - Design and implementation on FPGA
The high chip-level integration enables the implementation of large-scale parallel processing architectures with 64 and more processing nodes on a single chip or on an FPGA device...
Mouna Baklouti, Yassine Aydi, Philippe Marquet, Je...
139
Voted
IROS
2006
IEEE
117views Robotics» more  IROS 2006»
15 years 9 months ago
Design and Manufacturing of a Mobile Rescue Robot
This paper presents design and manufacturing procedure of a tele-operative rescue robot. First, the general task to be performed by such a robot is defined, and variant kinematic m...
S. Ali A. Moosavian, Hesam Semsarilar, Arash Kalan...
136
Voted
INFOCOM
2007
IEEE
15 years 9 months ago
End-to-End Routing for Dual-Radio Sensor Networks
— Dual-radio, dual-processor nodes are an emerging class of Wireless Sensor Network devices that provide both lowenergy operation as well as substantially increased computational...
Thanos Stathopoulos, Martin Lukac, Dustin McIntire...
MOBISYS
2005
ACM
16 years 3 months ago
Turducken: hierarchical power management for mobile devices
Abstract-Maintaining optimal consistency in a distributed system requires that nodes be always-on to synchronize information. Unfortunately, mobile devices such as laptops do not h...
Jacob Sorber, Nilanjan Banerjee, Mark D. Corner, S...