In this paper we introduce Resizable Data Composer-Cache (RDC-Cache). This novel cache architecture operates correctly at sub 500 mV in 65 nm technology tolerating large number of...
Avesta Sasan, Houman Homayoun, Ahmed M. Eltawil, F...
The evolving concepts of mobile computing, context-awareness, and ambient intelligence are increasingly influencing user's experience of services. Therefore, the goal of this...
Abstract— Scheduled wireless mesh networks (WMNs) represent an important paradigm in the development of high speed wireless access networks. As a consequence of [1], it can be sh...
Skanda N. Muthaiah, Aravind Iyer, Aditya Karnik, C...
We explore how fixed-point operators can be designed to interact and be composed to form autonomic control mechanisms. We depart from the idea that an operator is idempotent only ...
The problem of interconnect architecture arises when an array of processors needs to be integrated on one chip. With the deep sub-micron technology, devices become cheap while wir...
Feng Zhou, Esther Y. Cheng, Bo Yao, Chung-Kuan Che...