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DAC
2008
ACM
16 years 4 months ago
Energy-optimal software partitioning in heterogeneous multiprocessor embedded systems
Embedded systems with heterogeneous processors extend the energy/timing trade-off flexibility and provide the opportunity to fine tune resource utilization for particular applicat...
Michel Goraczko, Jie Liu, Dimitrios Lymberopoulos,...
135
Voted
GLOBECOM
2007
IEEE
15 years 10 months ago
Non-Cooperative Design of Translucent Networks
This paper introduces a new game theoretic formulation for the design and routing of resilient and translucent networks. An integer linear programming (ILP) modeling is also presen...
Benoît Châtelain, Shie Mannor, Fran&cc...
143
Voted
DATE
2003
IEEE
104views Hardware» more  DATE 2003»
15 years 9 months ago
Efficient Field Processing Cores in an Innovative Protocol Processor System-on-Chip
We present an innovative protocol processor component that combines wire-speed processing for low-level, and best effort processing for higher-level protocols. The component is a ...
George Lykakis, N. Mouratidis, Kyriakos Vlachos, N...
143
Voted
DAC
2007
ACM
16 years 4 months ago
Endurance Enhancement of Flash-Memory Storage, Systems: An Efficient Static Wear Leveling Design
This work is motivated by the strong demand of reliability enhancement over flash memory. Our objective is to improve the endurance of flash memory with limited overhead and witho...
Yuan-Hao Chang, Jen-Wei Hsieh, Tei-Wei Kuo
ICC
2009
IEEE
116views Communications» more  ICC 2009»
15 years 1 months ago
Efficient Implementation of Binary Sequence Generator for WiMAX and WRAN on Programmable Digital Signal Processor
In this paper, an efficient design for implementing binary sequence generator on 32-bit instruction execution mode TI TMS320C6416 DSP is presented. The main goal is to achieve high...
Lok Tiing Tie, Ser Wah Oh, K. J. M. Kua