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IPPS
2005
IEEE
15 years 9 months ago
Technology-based Architectural Analysis of Operand Bypass Networks for Efficient Operand Transport
As semiconductor feature sizes decrease, interconnect delay is becoming a dominant component of processor cycle times. This creates a critical need to shift microarchitectural des...
Hongkyu Kim, D. Scott Wills, Linda M. Wills
119
Voted
ESORICS
2005
Springer
15 years 9 months ago
On Scalability and Modularisation in the Modelling of Network Security Systems
Abstract. As the use of computers and data communication technologies spreads, network security systems are becoming increasingly complex, due to the incorporation of a variety of ...
João Porto de Albuquerque, Heiko Krumm, Pau...
ISCA
2003
IEEE
101views Hardware» more  ISCA 2003»
15 years 9 months ago
Overcoming the Limitations of Conventional Vector Processors
Despite their superior performance for multimedia applications, vector processors have three limitations that hinder their widespread acceptance. First, the complexity and size of...
Christoforos E. Kozyrakis, David A. Patterson
251
Voted
JCP
2008
155views more  JCP 2008»
15 years 3 months ago
Algorithm to Optimize Code Size and Energy Consumption in Real Time Embedded System
Processor is an important computing element in portable battery operated real time embedded system and it consumes most of the battery energy. Energy consumption, processor memory ...
Santosh D. Chede, Kishore D. Kulat
162
Voted
EUROSYS
2006
ACM
16 years 22 days ago
Experiences in building and operating ePOST, a reliable peer-to-peer application
Peer-to-peer (p2p) technology can potentially be used to build highly reliable applications without a single point of failure. However, most of the existing applications, such as ...
Alan Mislove, Ansley Post, Andreas Haeberlen, Pete...