50 search results - page 2 / 10 » Design flow of robust routed power distribution for low powe... |
DFT
2005
IEEE
13 years 8 months ago
2005
IEEE
A built-in self-test (BIST) scheme is presented which both reduces overhead for detecting random-pattern-resistant (r.p.r.) faults as well as reduces power consumption during test...
ISCAS
2003
IEEE
13 years 11 months ago
2003
IEEE
Abstract— The design of robust and area efficient power distribution networks for high speed, high complexity integrated circuits has become a challenging task. The integrity of...
GI
2004
Springer
13 years 11 months ago
2004
Springer
: Next to authentication, secure key exchange is considered the most critical and complex issue regarding ad-hoc network security. We present a low-cost, (i.e. low hardware-complex...
ASPDAC
2004
ACM
13 years 11 months ago
2004
ACM
— Robust power distribution within available routing area resources is critical to chip performance and reliability. In this paper, we propose a novel and efficient method for o...
ASAP
2005
IEEE
13 years 12 months ago
2005
IEEE
This paper explores low-power reliable microarchitectures for addition. Power, speed, and reliability (both defect- and fault-tolerance) are important metrics of system design, sp...