275 search results - page 14 / 55 » Design for Verification of SystemC Transaction Level Models |
APCCAS
2006
IEEE
15 years 3 months ago
2006
IEEE
We described an H.264 decoder implemented with our design methodology, in which a system function model of transaction level is first captured in SystemC and refined into RTL with ...
DATE
2006
IEEE
15 years 3 months ago
2006
IEEE
Most of the challenges related to the development of multi-processor platforms for complex wireless and multimedia applications fall into the Electronic System Level (ESL) domain....
CODES
2003
IEEE
15 years 3 months ago
2003
IEEE
the level of abstraction in system design promises to enable faster exploration of the design space at early stages. While scheduling decision for embedded software has great impa...
DATE
2009
IEEE
15 years 4 months ago
2009
IEEE
—The complexity of the test infrastructure and test strategies in systems-on-chip approaches the complexity of the functional design space. This paper presents test design space ...
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CASSIS
2004
Springer
15 years 1 months ago
2004
Springer
The JAVA CARD transaction mechanism can ensure that a sequence of statements either is executed to completion or is not executed at all. Transactions make verification of JAVA CARD...