275 search results - page 28 / 55 » Design for Verification of SystemC Transaction Level Models |
DAC
2005
ACM
15 years 10 months ago
2005
ACM
el Predicate Abstraction and Refinement for Verifying RTL Verilog Himanshu Jain CMU SCS, Pittsburgh, PA 15213 Daniel Kroening ETH Z?urich, Switzerland Natasha Sharygina CMU SCS an...
DELTA
2004
IEEE
15 years 1 months ago
2004
IEEE
Systems-on-Chip (SoCs) are heterogeneous by nature as they may integrate digital, analog, RF hardware as well as software components or non electrical parts such as sensors or act...
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FDL
2004
IEEE
15 years 1 months ago
2004
IEEE
System-on-Chip (SOC) and other complex distributed hardware/software systems contain heterogeneous components such as DSPs, micro-controllers, application specific logic etc., whi...
ISSS
2002
IEEE
15 years 2 months ago
2002
IEEE
We have fabricated a Chip Multiprocessor prototype code-named Merlot to proof our novel speculative multithreading architecture. On Merlot, multiple threads provide wider issue wi...
SAC
2006
ACM
15 years 3 months ago
2006
ACM
Transaction management is a known crosscutting concern. Previous research has been conducted to express this concern as an aspect. However, such work has used general-purpose aspe...