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» Design for Verification of SystemC Transaction Level Models
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DAC
2008
ACM
15 years 10 months ago
Specify-explore-refine (SER): from specification to implementation
Driven by increasing complexity and reliability demands, the Japanese Aerospace Exploration Agency (JAXA) in 2004 commissioned development of ELEGANT, a complete SpecC-based envir...
Andreas Gerstlauer, Junyu Peng, Dongwan Shin, Dani...
ACSD
2001
IEEE
74views Hardware» more  ACSD 2001»
15 years 1 months ago
From Code to Models
One of the corner stones of formal methods is the notion traction enables analysis. By the construction of act model we can trade implementation detail for analytical power. The i...
Gerard J. Holzmann
MICRO
2008
IEEE
137views Hardware» more  MICRO 2008»
14 years 9 months ago
Verification of chip multiprocessor memory systems using a relaxed scoreboard
Verification of chip multiprocessor memory systems remains challenging. While formal methods have been used to validate protocols, simulation is still the dominant method used to ...
Ofer Shacham, Megan Wachs, Alex Solomatnikov, Amin...
RTDB
2001
83views more  RTDB 2001»
14 years 11 months ago
Updates and View Maintenance
A database system contains base data items which record and model a physical, real world environment. For better decision support, base data items are summarized and correlated to...
Ben Kao, Kam-yiu Lam, Brad Adelberg
CODES
2007
IEEE
15 years 4 months ago
Complex task activation schemes in system level performance analysis
The design and analysis of today’s complex real-time systems requires advanced methods. Due to ever growing functionality, hardware complexity and component interaction, applyin...
Wolfgang Haid, Lothar Thiele