275 search results - page 33 / 55 » Design for Verification of SystemC Transaction Level Models |
RTSS
1999
IEEE
15 years 2 months ago
1999
IEEE
In this paper, we demonstrate a high-level approach to modeling and analyzing complex safety-critical systems through a case study in the area of air traffic management. In partic...
TCAD
2008
14 years 9 months ago
2008
el Predicate Abstraction and Refinement Techniques for Verifying RTL Verilog Himanshu Jain, Daniel Kroening, Natasha Sharygina, and Edmund M. Clarke, Fellow, IEEE As a first step, ...
ISSRE
2000
IEEE
15 years 2 months ago
2000
IEEE
The Unified Modeling Language, UML, is the objectoriented notation adopted as the standard for objectoriented Analysis and Design by the Object Management Group. This paper report...
HIPC
2009
Springer
14 years 7 months ago
2009
Springer
Software transactional memory (STM) is an emerging concurrency control mechanism for shared memory accesses. Early abort is one of the important techniques to improve the executio...
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VLSID
2000
IEEE
15 years 1 months ago
2000
IEEE
We address the problem of verifying the correctness of pre-silicon models of a microprocessor. We touch on the latest advances in this area by considering two different aspects of...