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» Design for Verification of SystemC Transaction Level Models
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EURODAC
1994
IEEE
211views VHDL» more  EURODAC 1994»
15 years 1 months ago
Advanced simulation and modeling techniques for hardware quality verification of digital systems
synchronisation also play a fundamental role in overall system robustness. ElectroMagnetic Compatibility (EMC) and ElectroMagnetic Interference (EMI) issues also have to be conside...
S. Forno, Stephen Rochel
FAC
2000
114views more  FAC 2000»
14 years 9 months ago
Representational Reasoning and Verification
Formal approaches to the design of interactive systems rely on reasoning about properties of the t a very high level of abstraction. Specifications to support such an approach typi...
Gavin J. Doherty, José Creissac Campos, Mic...
ACSD
2004
IEEE
124views Hardware» more  ACSD 2004»
15 years 1 months ago
A Behavioral Type Inference System for Compositional System-on-Chip Design
The design productivity gap has been recognized by the semiconductor industry as one of the major threats to the continued growth of system-on-chips and embedded systems. Ad-hoc s...
Jean-Pierre Talpin, David Berner, Sandeep K. Shukl...
FDL
2005
IEEE
15 years 3 months ago
Mixing Synchronous Reactive and Untimed Models of Computation
The support of heterogeneity at the specification level, that is, the ability to mix several models of computation (MoCs) in the system-level specification, is becoming increasing...
Fernando Herrera, Eugenio Villar
DDEP
2000
Springer
15 years 2 months ago
Context-Aware Digital Documents Described in a High-Level Petri Net-Based Hypermedia System
As mobile computing becomes widespread, so will the need for digital document delivery by hypertextual means. A further trend will be the provision of the ability for devices to de...
Jin-Cheon Na, Richard Furuta