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» Design for Verification of SystemC Transaction Level Models
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ICECCS
2007
IEEE
120views Hardware» more  ICECCS 2007»
15 years 1 months ago
Verifying the CICS File Control API with Z/Eves: An Experiment in the Verified Software Repository
Parts of the CICS transaction processing system were modelled formally in the 1980s in a collaborative project between IBM Hursley Park and Oxford University Computing Laboratory....
Leo Freitas, Konstantinos Mokos, Jim Woodcock
MEMOCODE
2007
IEEE
15 years 4 months ago
Towards Equivalence Checking Between TLM and RTL Models
The always increasing complexity of digital system is overcome in design flows based on Transaction Level Modeling (TLM) by designing and verifying the system at difbstraction le...
Nicola Bombieri, Franco Fummi, Graziano Pravadelli...
SP
1997
IEEE
106views Security Privacy» more  SP 1997»
15 years 1 months ago
Secure Software Architectures
The computer industry is increasingly dependent on open architectural standards for their competitive success. This paper describes a new approach to secure system design in which...
Mark Moriconi, Xiaolei Qian, Robert A. Riemenschne...
ASAP
2005
IEEE
121views Hardware» more  ASAP 2005»
15 years 3 months ago
Using TLM for Exploring Bus-based SoC Communication Architectures
As billion transistor System-on-chips (SoC) become commonplace and design complexity continues to increase, designers are faced with the daunting task of meeting escalating design...
Sudeep Pasricha, Mohamed Ben-Romdhane
GLVLSI
2002
IEEE
108views VLSI» more  GLVLSI 2002»
15 years 2 months ago
Protected IP-core test generation
Design simplification is becoming necessary to respect the target time-to-market of SoCs, and this goal can be obtained by using predesigned IP-cores. However, their correct inte...
Alessandro Fin, Franco Fummi