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» Design for Verification of SystemC Transaction Level Models
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CODES
2007
IEEE
15 years 4 months ago
ESL design and HW/SW co-verification of high-end software defined radio platforms
Multiple wireless technologies are converging to run on personal handhelds. The plethora of communication standards next to the cost issues of deeper submicron processing require ...
A. C. H. Ng, J. W. Weijers, Miguel Glassee, Thomas...
CODES
2006
IEEE
15 years 3 months ago
Accurate yet fast modeling of real-time communication
Accurate modeling of communication is a necessary part of system level design for real-time safety-critical applications. For efficient prediction of a system’s performance, Tra...
Gunar Schirner, Rainer Dömer
ICSE
2008
IEEE-ACM
15 years 10 months ago
Calysto: scalable and precise extended static checking
Automatically detecting bugs in programs has been a long-held goal in software engineering. Many techniques exist, trading-off varying levels of automation, thoroughness of covera...
Domagoj Babic, Alan J. Hu
CODES
2003
IEEE
15 years 3 months ago
Virtual synchronization technique with OS modeling for fast and time-accurate cosimulation
Hardware/Software cosimulation is the key process to shorten the design turn around time. We have proposed a novel technique, called virtual synchronization, for fast and time acc...
Youngmin Yi, Dohyung Kim, Soonhoi Ha
DAGSTUHL
2006
14 years 11 months ago
A Framework for Analyzing Composition of Security Aspects
The methodology of aspect-oriented software engineering has been proposed to factor out concerns that are orthogonal to the core functionality of a system. In particular, this is a...
Jorge Fox, Jan Jürjens