275 search results - page 46 / 55 » Design for Verification of SystemC Transaction Level Models |
DATE
1999
IEEE
15 years 2 months ago
1999
IEEE
This paper describes a simulation technique for RealTime Hw/Sw systems based on an object executable model. It allows designers to seamlessly estimate and verify their solutions f...
ISMVL
2007
IEEE
15 years 4 months ago
2007
IEEE
Designing modern circuits comprised of millions of gates is a very challenging task. Therefore new directions are investigated for efficient modeling and verification of such syst...
FPL
2004
Springer
15 years 3 months ago
2004
Springer
This paper presents the Customisable Modular Platform (CMP) approach. The aim is to accelerate FPGA application developraising the level of abstraction and facilitating design reus...
FM
1999
Springer
15 years 2 months ago
1999
Springer
Software architecture addresses the high level specification, design and analysis of software systems. Formal models can provide essential underpinning for architectural descripti...
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DAC
2005
ACM
15 years 10 months ago
2005
ACM
The challenge of verifying a modern microprocessor design is an overwhelming one: Increasingly complex micro-architectures combined with heavy time-to-market pressure have forced ...