275 search results - page 4 / 55 » Design for Verification of SystemC Transaction Level Models |
CASES
2006
ACM
15 years 3 months ago
2006
ACM
Designers of SoCs with non-digital components, such as analog or MEMS devices, can currently use high-level system design languages, such as SystemC, to model only the digital par...
EMSOFT
2010
Springer
14 years 7 months ago
2010
Springer
SystemC is the de facto standard for modeling embedded systems. It allows system design at various levels of abstractions, provides typical object-orientation features and incorpo...
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ISCAS
2003
IEEE
15 years 2 months ago
2003
IEEE
To handle today’s complexity, modern circuits and systems be specified at a high level of abstraction. Recently, SystemC has been proposed as a language that allows a fast on o...
CODES
2008
IEEE
15 years 4 months ago
2008
IEEE
In this special session we explore holistic approaches to hardware/software debug that use or integrate transaction level models (TLMs). We present several TLM-based approaches to...
DATE
2003
IEEE
15 years 3 months ago
2003
IEEE
This paper presents VISTA, a new methodology and tool dedicated to analyse system level performance by executing full-scale SW application code on a transaction-level model of the...