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CORR
2007
Springer
88views Education» more  CORR 2007»
14 years 10 months ago
Design and Fabrication of a Micro Electrostatic Vibration-to-Electricity Energy Converter
This paper presents a micro electrostatic vibration-toelectricity energy converter. For the 3.3 V supply voltage and 1cm2 chip area constraints, optimal design parameters were fou...
Yi Chiu, Chiung-Ting Kuo, Yu-Shan Chu
DATE
2010
IEEE
124views Hardware» more  DATE 2010»
15 years 3 months ago
Control network generator for latency insensitive designs
—Creating latency insensitive or asynchronous designs from clocked designs has potential benefits of increased modularity and robustness to variations. Several transformations h...
Eliyah Kilada, Kenneth S. Stevens
DATE
2010
IEEE
173views Hardware» more  DATE 2010»
15 years 3 months ago
Robust design of embedded systems
—This paper presents a methodology to evaluate and optimize the robustness of an embedded system in terms of invariability in case of design revisions. Early decisions in embedde...
Martin Lukasiewycz, Michael Glaß, Jürge...
DATE
2010
IEEE
139views Hardware» more  DATE 2010»
15 years 2 months ago
Pareto efficient design for reconfigurable streaming applications on CPU/FPGAs
We present a Pareto efficient design method for multi-dimensional optimization of run-time reconfigurable streaming applications on CPU/FPGA platforms, which automatically allocate...
Jun Zhu, Ingo Sander, Axel Jantsch
ASPDAC
1999
ACM
112views Hardware» more  ASPDAC 1999»
15 years 2 months ago
Relaxed Simulated Tempering for VLSI Floorplan Designs
In the past two decades, the simulated annealing technique has been considered as a powerful approach to handle many NP-hard optimization problems in VLSI designs. Recently, a new...
Jason Cong, Tianming Kong, Dongmin Xu, Faming Lian...