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83
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ASPDAC
2012
ACM
238views Hardware» more  ASPDAC 2012»
13 years 8 months ago
Design for manufacturability and reliability for TSV-based 3D ICs
—The 3D IC integration using through-silicon-vias (TSV) has gained tremendous momentum recently for industry adoption. However, as TSV involves disruptive manufacturing technolog...
David Z. Pan, Sung Kyu Lim, Krit Athikulwongse, Mo...
132
Voted
GLVLSI
2009
IEEE
262views VLSI» more  GLVLSI 2009»
14 years 10 months ago
Power distribution paths in 3-D ICS
Distributing power and ground to a vertically integrated system is a complex and difficult task. Interplane communication and power delivery are achieved by through silicon vias (...
Vasilis F. Pavlidis, Giovanni De Micheli
106
Voted
DAC
2012
ACM
13 years 2 months ago
Chip/package co-analysis of thermo-mechanical stress and reliability in TSV-based 3D ICs
In this work, we propose a fast and accurate chip/package thermomechanical stress and reliability co-analysis tool for TSV-based 3D ICs. We also present a design optimization meth...
Moongon Jung, David Z. Pan, Sung Kyu Lim
137
Voted
DAC
2011
ACM
14 years 7 days ago
TSV stress-aware full-chip mechanical reliability analysis and optimization for 3D IC
In this work, we propose an efficient and accurate full-chip thermomechanical stress and reliability analysis tool and design optimization methodology to alleviate mechanical rel...
Moongon Jung, Joydeep Mitra, David Z. Pan, Sung Ky...