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ASPDAC
2007
ACM
164views Hardware» more  ASPDAC 2007»
13 years 10 months ago
Thermal-Aware 3D IC Placement Via Transformation
- 3D IC technologies can help to improve circuit performance and lower power consumption by reducing wirelength. Also, 3D IC technology can be used to realize heterogeneous system-...
Jason Cong, Guojie Luo, Jie Wei, Yan Zhang
DAC
2012
ACM
11 years 8 months ago
Exploiting die-to-die thermal coupling in 3D IC placement
In this paper, we propose two methods used in 3D IC placement that effectively exploit the die-to-die thermal coupling in the stack. First, TSVs are spread on each die to reduce t...
Krit Athikulwongse, Mohit Pathak, Sung Kyu Lim
DAC
2012
ACM
11 years 8 months ago
Analysis of DC current crowding in through-silicon-vias and its impact on power integrity in 3D ICs
Due to the large geometry of through-silicon-vias (TSVs) and their connections to the power grid, significant current crowding can occur in 3D ICs. Prior works model TSVs and pow...
Xin Zhao, Michael Scheuermann, Sung Kyu Lim
ISPD
2012
ACM
283views Hardware» more  ISPD 2012»
12 years 1 months ago
Low-power gated bus synthesis for 3d ic via rectilinear shortest-path steiner graph
In this paper, we propose a new approach for gated bus synthesis [16] with minimum wire capacitance per transaction in three-dimensional (3D) ICs. The 3D IC technology connects di...
Chung-Kuan Cheng, Peng Du, Andrew B. Kahng, Shih-H...
ASPDAC
2007
ACM
90views Hardware» more  ASPDAC 2007»
13 years 10 months ago
Recent Research and Emerging Challenges in Physical Design for Manufacturability/Reliability
As IC process geometries scale down to the nanometer territory, the industry faces severe challenges of manufacturing limitations. To guarantee yield and reliability, physical des...
Chung-Wei Lin, Ming-Chao Tsai, Kuang-Yao Lee, Tai-...