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VLSID
2006
IEEE
183views VLSI» more  VLSID 2006»
15 years 4 months ago
Design Challenges for High Performance Nano-Technology
This tutorial present the key aspects of design challenges and its solutions that are being experienced in VLSI design in the era of nano technology. The focus will be on design c...
Goutam Debnath, Paul J. Thadikaran
ASAP
2005
IEEE
121views Hardware» more  ASAP 2005»
15 years 3 months ago
Using TLM for Exploring Bus-based SoC Communication Architectures
As billion transistor System-on-chips (SoC) become commonplace and design complexity continues to increase, designers are faced with the daunting task of meeting escalating design...
Sudeep Pasricha, Mohamed Ben-Romdhane
IWCMC
2006
ACM
15 years 4 months ago
Performance enhancing proxy for interactive 3G network gaming
Unlike non-time-critical applications like email and file transfer, network games demand timely data delivery to maintain the seemingly interactive presence of players in the vir...
Gene Cheung, Takashi Sakamoto, Michael Sweeney
IPPS
2010
IEEE
14 years 7 months ago
Designing high-performance and resilient message passing on InfiniBand
Abstract--Clusters featuring the InfiniBand interconnect are continuing to scale. As an example, the "Ranger" system at the Texas Advanced Computing Center (TACC) include...
Matthew J. Koop, Pavel Shamis, Ishai Rabinovitz, D...
ISQED
2005
IEEE
90views Hardware» more  ISQED 2005»
15 years 3 months ago
Analysis and Design of LVTSCR-based EOS/ESD Protection Circuits for Burn-in Environment
As technology feature size is reduced, ESD becomes one of the dominant failure modes due to the lower gate oxide breakdown voltage. Also, the holding voltage of LVTSCR devices is ...
Oleg Semenov, H. Sarbishaei, Manoj Sachdev