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ISLPED
2007
ACM
92views Hardware» more  ISLPED 2007»
14 years 11 months ago
Variable-latency adder (VL-adder): new arithmetic circuit design practice to overcome NBTI
Negative bias temperature instability (NBTI) has become a dominant reliability concern for nanoscale PMOS transistors. In this paper, we propose variable-latency adder (VL-adder) ...
Yiran Chen, Hai Li, Jing Li, Cheng-Kok Koh
SBCCI
2003
ACM
160views VLSI» more  SBCCI 2003»
15 years 3 months ago
Novel Design Methodology for High-Performance XOR-XNOR Circuit Design
As we scale down to deep submicron (DSM) technology, noise is becoming a metric of equal importance as power, speed, and area. Smaller feature sizes, low voltage, and high frequen...
Sumeer Goel, Mohamed A. Elgamel, Magdy A. Bayoumi
ISQED
2008
IEEE
112views Hardware» more  ISQED 2008»
15 years 4 months ago
Robust Analog Design for Automotive Applications by Design Centering with Safe Operating Areas
The effects of random variations during the manufacturing process on devices can be simulated as a variation of transistor parameters. Device degradation, due to temperature or vo...
Udo Sobe, Karl-Heinz Rooch, Andreas Ripp, Michael ...
ICCAD
2007
IEEE
103views Hardware» more  ICCAD 2007»
15 years 6 months ago
Enhancing design robustness with reliability-aware resynthesis and logic simulation
While circuit density and power efficiency increase with each major advance in IC technology, reliability with respect to soft errors tends to decrease. Current solutions to this...
Smita Krishnaswamy, Stephen Plaza, Igor L. Markov,...
WWW
2003
ACM
15 years 3 months ago
WS-Membership - Failure Management in a Web-Services World
An important factor in the successful deployment of federated web-services-based business activities will be the ability to guarantee reliable distributed operation and execution....
Werner Vogels, Christopher Ré