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SENSYS
2004
ACM
15 years 5 months ago
Hardware design experiences in ZebraNet
The enormous potential for wireless sensor networks to make a positive impact on our society has spawned a great deal of research on the topic, and this research is now producing ...
Pei Zhang, Christopher M. Sadler, Stephen A. Lyon,...
RSP
2003
IEEE
176views Control Systems» more  RSP 2003»
15 years 5 months ago
Rapid Design and Analysis of Communication Systems Using the BEE Hardware Emulation Environment
This paper describes the early analysis and estimation features currently implemented in the Berkeley Emulation Engine (BEE) system. BEE is an integrated rapid prototyping and des...
Chen Chang, Kimmo Kuusilinna, Brian C. Richards, A...
ISCAS
2007
IEEE
106views Hardware» more  ISCAS 2007»
15 years 6 months ago
Ensemble Dependent Matrix Methodology for Probabilistic-Based Fault-tolerant Nanoscale Circuit Design
—Two probabilistic-based models, namely the Ensemble-Dependent Matrix model [1][3] and the Markov Random Field model [2], have been proposed to deal with faults in nanoscale syst...
Huifei Rao, Jie Chen, Changhong Yu, Woon Tiong Ang...
DAC
2002
ACM
16 years 21 days ago
Dynamic hardware plugins in an FPGA with partial run-time reconfiguration
Tools and a design methodology have been developed to support partial run-time reconfiguration of FPGA logic on the Field Programmable Port Extender. High-speed Internet packet pr...
Edson L. Horta, John W. Lockwood, David E. Taylor,...
79
Voted
DATE
2005
IEEE
114views Hardware» more  DATE 2005»
15 years 5 months ago
A Two-Level Modeling Approach to Analog Circuit Performance Macromodeling
In this paper, we present a two-level modeling approach to performance macromodeling based on radial basis function Support Vector Machine (SVM). The two-level model consists of a...
Mengmeng Ding, Ranga Vemuri