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ISCAS
2007
IEEE
132views Hardware» more  ISCAS 2007»
15 years 3 months ago
On-Line Histogram Equalization for Flash ADC
— We present theory, design and measurement results for an on-line histogram equalization algorithm implemented on a 750MS/s 6b flash analog to digital converter in standard 0.3...
Yanyi Liu Wong, Marc H. Cohen, Pamela Abshire
FP
1989
124views Formal Methods» more  FP 1989»
15 years 1 months ago
Deriving the Fast Fourier Algorithm by Calculation
This paper reports an explanation of an intricate algorithm in the terms of a potentially mechanisable rigorous-development method. It uses notations and techniques of Sheeran 1] ...
Geraint Jones
ISCAS
2005
IEEE
191views Hardware» more  ISCAS 2005»
15 years 3 months ago
Behavioural modeling and simulation of a switched-current phase locked loop
Recent work has shown that the use of switched current methods can provide an effective route to implementation of analog IC functionality using a standard digital CMOS process. Fu...
Peter R. Wilson, Reuben Wilcock
ECCC
2007
115views more  ECCC 2007»
14 years 9 months ago
A (De)constructive Approach to Program Checking
Program checking, program self-correcting and program selftesting were pioneered by [Blum and Kannan] and [Blum, Luby and Rubinfeld] in the mid eighties as a new way to gain conï¬...
Shafi Goldwasser, Dan Gutfreund, Alexander Healy, ...
85
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ICDE
2010
IEEE
248views Database» more  ICDE 2010»
15 years 9 months ago
FPGA Acceleration for the Frequent Item Problem
Abstract-- Field-programmable gate arrays (FPGAs) can provide performance advantages with a lower resource consumption (e.g., energy) than conventional CPUs. In this paper, we show...
Gustavo Alonso, Jens Teubner, René Mül...