Sciweavers

305 search results - page 8 / 61
» Design of Digital Circuits on the Basis of Hardware Template...
Sort
View
VTS
1999
IEEE
81views Hardware» more  VTS 1999»
15 years 1 months ago
Simulation-Based Design Error Diagnosis and Correction in Combinational Digital Circuits
This paper describes an approach to design error diagnosis and correction in combinational digital circuits. Our approach targets small errors introduced during the design process...
Debashis Nayak, D. M. H. Walker
DAC
2003
ACM
15 years 10 months ago
A transformation based algorithm for reversible logic synthesis
A digital combinational logic circuit is reversible if it maps each input pattern to a unique output pattern. Such circuits are of interest in quantum computing, optical computing...
D. Michael Miller, Dmitri Maslov, Gerhard W. Dueck
69
Voted
DATE
1999
IEEE
73views Hardware» more  DATE 1999»
15 years 1 months ago
Design For Testability Method for CML Digital Circuits
This paper presents a new Design for Testability (DFT) technique for Current-Mode Logic (CML) circuits. This new technique, with little overhead, using built-in detectors, monitor...
Bernard Antaki, Yvon Savaria, Nanhan Xiong, Saman ...
ISQED
2005
IEEE
125views Hardware» more  ISQED 2005»
15 years 3 months ago
A New Method for Design of Robust Digital Circuits
As technology continues to scale beyond 100nm, there is a significant increase in performance uncertainty of CMOS logic due to process and environmental variations. Traditional c...
Dinesh Patil, Sunghee Yun, Seung-Jean Kim, Alvin C...
DATE
2008
IEEE
163views Hardware» more  DATE 2008»
15 years 4 months ago
Design flow for embedded FPGAs based on a flexible architecture template
Modern digital signal processing applications have an increasing demand for computational power while needing to preserve low power dissipation and high flexibility. For many appl...
B. Neumann, Thorsten von Sydow, Holger Blume, Tobi...