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» Design of Neuromorphic Hardwares
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MICRO
2006
IEEE
74views Hardware» more  MICRO 2006»
15 years 7 months ago
Phoenix: Detecting and Recovering from Permanent Processor Design Bugs with Programmable Hardware
Although processor design verification consumes ever-increasing resources, many design defects still slip into production silicon. In a few cases, such bugs have caused expensive...
Smruti R. Sarangi, Abhishek Tiwari, Josep Torrella...
DAC
2005
ACM
16 years 2 months ago
IODINE: a tool to automatically infer dynamic invariants for hardware designs
We describe IODINE, a tool to automatically extract likely design properties using dynamic analysis. A practical bottleneck in the formal verification of hardware designs is the n...
Sudheendra Hangal, Naveen Chandra, Sridhar Narayan...
101
Voted
DATE
2008
IEEE
68views Hardware» more  DATE 2008»
15 years 8 months ago
Automatic Generation of Complex Properties for Hardware Designs
Property checking is a promising approach to prove the correctness of today’s complex designs. However, in practice this requires the formulation of formal properties which is a...
Frank Rogin, Thomas Klotz, Görschwin Fey, Rol...
FPL
2000
Springer
87views Hardware» more  FPL 2000»
15 years 5 months ago
Toward Uniform Approach to Design of Evolvable Hardware Based Systems
The paper tries to establish the uniform design concept for evolvable hardware based applications. Evolvable circuit is understood as a system component with ability to evolve. As ...
Lukás Sekanina, Azeddien M. Sllame
116
Voted
ISSS
2000
IEEE
144views Hardware» more  ISSS 2000»
15 years 6 months ago
Efficient Hardware Controller Synthesis for Synchronous Dataflow Graph in System Level Design
This paper concerns automatic hardware synthesis from data flow graph (DFG) specification in system level design. In the presented design methodology, each node of a data flow gra...
Hyunuk Jung, Kangnyoung Lee, Soonhoi Ha