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» Design of Neuromorphic Hardwares
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83
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EURODAC
1995
IEEE
150views VHDL» more  EURODAC 1995»
15 years 5 months ago
A reuse scenario for the VHDL-based hardware design flow
Viktor Preis, Renate Henftling, Markus Schütz...
74
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DT
2006
62views more  DT 2006»
15 years 1 months ago
Automated Source-Level Error Localization in Hardware Designs
Bernhard Peischl, Franz Wotawa