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    2007
    IEEE
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    Using CTL formulae as component abstraction in a design and verification flow
    15 years 8 months ago
    Using CTL formulae as component abstraction in a design and verification flow
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    Cécile Braunstein, Emmanuelle Encrenaz
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    DATE
    2007
    IEEE
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    Design challenges at 65nm and beyond
    15 years 8 months ago
    Design challenges at 65nm and beyond
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    Andrew B. Kahng
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    DATE
    2007
    IEEE
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    Modeling and simulation alternatives for the design of networked embedded systems
    15 years 8 months ago
    Modeling and simulation alternatives for the design of networked embedded systems
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    E. Alessio, Franco Fummi, Davide Quaglia, Maura Tu...
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    DATE
    2007
    IEEE
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    A symbolic methodology for the verification of analog and mixed signal designs
    15 years 8 months ago
    A symbolic methodology for the verification of analog and mixed signal designs
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    Ghiath Al Sammane, Mohamed H. Zaki, Sofiène...
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    DATE
    2007
    IEEE
    80views Hardware» more  DATE 2007»
    Incremental ABV for functional validation of TL-to-RTL design refinement
    15 years 8 months ago
    Incremental ABV for functional validation of TL-to-RTL design refinement
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    Nicola Bombieri, Franco Fummi, Graziano Pravadelli
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