8345 search results - page 5 / 1669 » Design of Neuromorphic Hardwares |
QEST
2010
IEEE
14 years 7 months ago
2010
IEEE
Adaptive techniques like voltage and frequency scaling, process variations and the randomness of input data contribute signi cantly to the statistical aspect of contemporary hardwa...
ISCAS
2006
IEEE
15 years 3 months ago
2006
IEEE
Abstract— We present a simple silicon circuit for modelling voltagedependent ion channels found within neural cells, capturing both the gating particle’s sigmoidal activation (...
ISCAS
2006
IEEE
15 years 3 months ago
2006
IEEE
Abstract—We present a silicon neuron that uses shunting inhibition (conductance-based) with a synaptic rise-time to achieve synchrony. Synaptic rise-time promotes synchrony by de...
105
Voted
ISCAS
2008
IEEE
15 years 3 months ago
2008
IEEE
— This paper presents an analogue integrated circuit implementation of a cortical neuron model. The VLSI chip prototype has been implemented in a 0.35 µm CMOS technology. The si...
ISCAS
2005
IEEE
15 years 3 months ago
2005
IEEE
— The dorsal nucleus of the lateral lemniscus (DNLL) is a distinct group of auditory cells that play a strategic role in azimuthal echolocation in the bat. Dominated by EI-type c...