19 search results - page 3 / 4 » Design of a High-Throughput Distributed Shared-Buffer NoC Ro... |
HPCA
2009
IEEE
15 years 10 months ago
2009
IEEE
Interconnection plays an important role in performance and power of CMP designs using deep sub-micron technology. The network-on-chip (NoCs) has been proposed as a scalable and hi...
ASPDAC
2011
ACM
14 years 1 months ago
2011
ACM
Abstract— Three-dimensional (3D) integration and Networkon-Chip (NoC) are both proposed to tackle the on-chip interconnect scaling problems, and extensive research efforts have b...
DAC
2011
ACM
13 years 9 months ago
2011
ACM
Process Variation (PV) is increasingly threatening the reliability of Networks-on-Chips. Thus, various resilient router designs have been recently proposed and evaluated. However,...
DAC
2009
ACM
15 years 2 months ago
2009
ACM
Process scaling has given designers billions of transistors to work with. As feature sizes near the atomic scale, extensive variation and wearout inevitably make margining unecono...
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CNSR
2010
IEEE
15 years 27 days ago
2010
IEEE
— Buffered crossbar (CICQ) switches have shown a high potential in scaling Internet routers capacity. However, they require expensive on-chip buffers whose cost grows quadratical...