Sciweavers

1146 search results - page 107 / 230
» Design of a multimedia processor based on metrics computatio...
Sort
View
IPPS
2010
IEEE
14 years 7 months ago
Prototype for a large-scale static timing analyzer running on an IBM Blue Gene
This paper focuses on parallelization of the classic static timing analysis (STA) algorithm for verifying timing characteristics of digital integrated circuits. Given ever-increasi...
Akintayo Holder, Christopher D. Carothers, Kerim K...
ICALP
2009
Springer
15 years 10 months ago
Sleep with Guilt and Work Faster to Minimize Flow Plus Energy
In this paper we extend the study of flow-energy scheduling to a model that allows both sleep management and speed scaling. Our main result is a sleep management algorithm called I...
Tak Wah Lam, Lap-Kei Lee, Hing-Fung Ting, Isaac Ka...
IPPS
2000
IEEE
15 years 2 months ago
Scalable Parallel Clustering for Data Mining on Multicomputers
This paper describes the design and implementation on MIMD parallel machines of P-AutoClass, a parallel version of the AutoClass system based upon the Bayesian method for determini...
D. Foti, D. Lipari, Clara Pizzuti, Domenico Talia
DAC
1997
ACM
15 years 1 months ago
Formal Verification of a Superscalar Execution Unit
Abstract. Many modern systems are designed as a set of interconnected reactive subsystems. The subsystem verification task is to verify an implementation of the subsystem against t...
Kyle L. Nelson, Alok Jain, Randal E. Bryant
HPCA
1999
IEEE
15 years 2 months ago
Impulse: Building a Smarter Memory Controller
Impulse is a new memory system architecture that adds two important features to a traditional memory controller. First, Impulse supports application-specific optimizations through...
John B. Carter, Wilson C. Hsieh, Leigh Stoller, Ma...