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ISVLSI
2005
IEEE
169views VLSI» more  ISVLSI 2005»
15 years 3 months ago
High Performance Array Processor for Video Decoding
high NRE cost. Therefore, general purpose programmable processors using software to perform various functions become more attractive since programmability can simplify system devel...
J. Lee, Narayanan Vijaykrishnan, Mary Jane Irwin
PE
2006
Springer
127views Optimization» more  PE 2006»
14 years 9 months ago
Design and analysis of a class-aware recursive loop scheduler for class-based scheduling
In this paper, we consider the problem of devising a loop scheduler that allocates slots to users according to their relative weights as smoothly as possible. Instead of the exist...
Raphael Rom, Moshe Sidi, Hwee Pink Tan
80
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ICMCS
2007
IEEE
117views Multimedia» more  ICMCS 2007»
15 years 4 months ago
Digital Media Indexing on the Cell Processor
We present a case study of developing a digital media indexing application, code-named MARVEL, on the STI Cell Broadband Engine (CBE) processor. There are two aspects of the targe...
Lurng-Kuo Liu, Qiang Liu, Apostol Natsev, Kenneth ...
RSA
2010
98views more  RSA 2010»
14 years 8 months ago
Network delay inference from additive metrics
We demonstrate the use of computational phylogenetic techniques to solve a central problem in inferential network monitoring. More precisely, we design a novel algorithm for multi...
Shankar Bhamidi, Ram Rajagopal, Sébastien R...
LCTRTS
2005
Springer
15 years 3 months ago
Generation of permutations for SIMD processors
Short vector (SIMD) instructions are useful in signal processing, multimedia, and scientific applications. They offer higher performance, lower energy consumption, and better res...
Alexei Kudriavtsev, Peter M. Kogge