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CAL
2005
14 years 9 months ago
The Danger of Interval-Based Power Efficiency Metrics: When Worst Is Best
This paper shows that if the execution of a program is divided into distinct intervals, it is possible for one processor or configuration to provide the best power efficiency over ...
Yiannakis Sazeides, Rakesh Kumar, Dean M. Tullsen,...
SIPS
2008
IEEE
15 years 4 months ago
The support of software design patterns for streaming RPC on embedded multicore processors
The development of embedded system has been toward the multicore architectures in the recent years. It raises concerns in the community of supporting programming models and langua...
Kun-Yuan Hsieh, Yen-Chih Liu, Chi-Hua Lai, Jenq Ku...
TCOS
2010
14 years 4 months ago
Green Secure Processors: Towards Power-Efficient Secure Processor Design
With the increasing wealth of digital information stored on computer systems today, security issues have become increasingly important. In addition to attacks targeting the softwar...
Siddhartha Chhabra, Yan Solihin
CASES
2008
ACM
14 years 11 months ago
Cache-aware cross-profiling for java processors
Performance evaluation of embedded software is essential in an early development phase so as to ensure that the software will run on the embedded device's limited computing r...
Walter Binder, Alex Villazón, Martin Schoeb...
DATE
2004
IEEE
118views Hardware» more  DATE 2004»
15 years 1 months ago
Distributed Multimedia System Design: A Holistic Perspective
Multimedia systems play a central part in many human activities. Due to the significant advances in the VLSI technology, there is an increasing demand for portable multimedia appl...
Radu Marculescu, Massoud Pedram, Jörg Henkel