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ARITH
2005
IEEE
15 years 3 months ago
The Vector Floating-Point Unit in a Synergistic Processor Element of a CELL Processor
The floating-point unit in the Synergistic Processor Element of the 1st generation multi-core CELL Processor is described. The FPU supports 4-way SIMD single precision and intege...
Silvia M. Müller, Christian Jacobi 0002, Hwa-...
ICMCS
2007
IEEE
107views Multimedia» more  ICMCS 2007»
15 years 3 months ago
Power Efficient Motion Estimation using Multiple Imprecise Metric Computations
In this paper, we propose power efficient motion estimation (ME) using multiple imprecise sum absolute difference (SAD) metric computations. We extend recent work in [18] by prov...
In Suk Chong, Antonio Ortega
EH
2004
IEEE
117views Hardware» more  EH 2004»
15 years 1 months ago
Multi-objective Optimization of a Parameterized VLIW Architecture
The use of Application Specific Instruction-set Processors (ASIP) in embedded systems is a solution to the problem of increasing complexity in the functions these systems have to ...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi,...
SOSP
1997
ACM
14 years 11 months ago
The Design, Implementation and Evaluation of SMART: A Scheduler for Multimedia Applications
Real-time applications such as multimedia audio and video are increasingly populating the workstation desktop. To support the execution of these applications in conjunction with t...
Jason Nieh, Monica S. Lam
ICMCS
2007
IEEE
103views Multimedia» more  ICMCS 2007»
15 years 3 months ago
Multimedia Adaptive Computer based Testing: An Overview
Instead of computer games, animations, cartoons, and videos being used only for entertainment by kids, there is now an interest in using multimedia for “innovative testing.” R...
Anup Basu, Irene Cheng, Mun Prasad, Gautam Rao