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» Design of an Early Minicomputer
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HOTNETS
2010
14 years 4 months ago
Using strongly typed networking to architect for tussle
Today's networks discriminate towards or against traffic for a wide range of reasons, and in response end users and their applications increasingly attempt to evade monitorin...
Chitra Muthukrishnan, Vern Paxson, Mark Allman, Ad...
TVLSI
2002
84views more  TVLSI 2002»
14 years 9 months ago
Application of instruction analysis/scheduling techniques to resource allocation of superscalar processors
This paper presents the development of instruction analysis/scheduling CAD techniques to measure the distribution of functional unit usage and the micro operation level parallelis...
Ing-Jer Huang, Ping-Huei Xie
ICFEM
2010
Springer
14 years 8 months ago
A Methodology for Automatic Diagnosability Analysis
We present an algorithm based on temporal-epistemic model checking combined with fault injection to analyse automatically the diagnosability of faults by agents in the system. We d...
Jonathan Ezekiel, Alessio Lomuscio
TON
2010
119views more  TON 2010»
14 years 8 months ago
Thwarting zero-day polymorphic worms with network-level length-based signature generation
—It is crucial to detect zero-day polymorphic worms and to generate signatures at network gateways or honeynets so that we can prevent worms from propagating at their early phase...
Lanjia Wang, Zhichun Li, Yan Chen, Zhi Fu, Xing Li
ASPDAC
2010
ACM
143views Hardware» more  ASPDAC 2010»
14 years 7 months ago
A low latency wormhole router for asynchronous on-chip networks
Asynchronous on-chip networks are power efficient and tolerant to process variation but they are slower than synchronous on-chip networks. A low latency asynchronous wormhole route...
Wei Song, Doug Edwards